Why Do x86, ARM, and RISC‑V Dominate Modern CPUs? A Deep ISA Comparison

Overview of Modern ISAs

Modern processors mainly use two instruction set families: the complex‑instruction‑set architecture (CISC) represented by x86, and the reduced‑instruction‑set architecture (RISC) represented by ARM, MIPS, Alpha, and the emerging RISC‑V.

CISC (x86) : aims to accomplish many tasks in a single instruction, offering high performance at the cost of larger silicon area and higher power consumption.

RISC : breaks tasks into simpler, smaller instructions, reducing power and area but often requiring more cycles to achieve the same work.

x86 Instruction Set

The x86 family includes x86‑32 (Intel), x86‑64 (Intel), and AMD64 (AMD). Its design prioritises binary compatibility across generations, leading to a continuously expanding instruction set—over 1,600 instructions after nearly 40 years.

Key characteristics:

Strong instructions can perform complex operations (e.g., moving data between arbitrary memory locations) in a single clock cycle.

Compatibility with legacy software made x86 the dominant ISA for PCs, laptops, and servers, backed by IBM’s early support.

Drawbacks include a complex hardware design, large transistor count, and higher power consumption.

ARM Instruction Set

Analysis of program traces in the 1980s showed that roughly 80% of instruction executions involve a small subset of instructions (loads, stores, branches, compares). ARM was created to keep only the most frequently used, simple instructions.

ARM offers three licensing profiles:

Cortex‑A – high‑performance applications.

Cortex‑R – real‑time systems.

Cortex‑M – embedded devices.

Compared with x86, ARM removes many redundant instructions and replaces a single powerful x86 instruction with several simpler ARM instructions, resulting in lower power consumption and smaller silicon area, but increased compiler and assembly complexity.

RISC‑V Instruction Set

RISC‑V evolved from earlier RISC generations (RISC‑I to RISC‑IV) and has become the open‑source ISA that many consider the third wave after x86 and ARM. Its modular design supports extensive customization, making it popular in IoT, and increasingly in PCs and servers.

Key milestones in China’s RISC‑V ecosystem include the formation of the China RISC‑V Industry Alliance (Sept 2018), the Open Instruction Set Ecology (Nov 2018), and several commercial releases such as Alibaba’s Xuantie 910 (July 2019) and Zhaoyi’s 32‑bit MCU (Aug 2019). Recent events include the 2023 RISC‑V China Summit and upcoming large‑scale commercial deployments.

Comparative Summary

The choice between CISC and RISC architectures depends on application requirements:

x86 : closed ecosystem, strong legacy support, high performance per core, but higher power and area.

ARM : open licensing, lower power, smaller cores, widely adopted in mobile and embedded markets, but requires more instructions to achieve complex operations.

RISC‑V : fully open, no licensing fees, highly extensible, still maturing in high‑performance domains.

Domestic Chinese CPU vendors follow four main technology paths—x86, ARM, MIPS, and Alpha—each with a set of leading manufacturers (e.g., Zhaoxin, HaiGuang, Kunpeng, FeiTeng, Loongson, ShenWei). The industry continues to balance innovation, ecosystem openness, and compatibility constraints.