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Architects' Tech Alliance
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Architects' Tech Alliance

Sharing project experiences, insights into cutting-edge architectures, focusing on cloud computing, microservices, big data, hyper-convergence, storage, data protection, artificial intelligence, industry practices and solutions.

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Latest from Architects' Tech Alliance

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Architects' Tech Alliance
Architects' Tech Alliance
Dec 28, 2025 · Artificial Intelligence

Google’s TPU v7: How 1.5 & 2.6 Optical Modules per Chip Power AI Supercomputers

The article explains how Google’s TPU v7 supercomputer uses a simple yet powerful networking scheme—1.5 optical modules per TPU for intra‑rack communication and an additional 2.6 modules per TPU for inter‑rack high‑speed links—enabling massive AI model training with balanced cost and performance.

AI supercomputingGoogleLarge-Scale Training
0 likes · 13 min read
Google’s TPU v7: How 1.5 & 2.6 Optical Modules per Chip Power AI Supercomputers
Architects' Tech Alliance
Architects' Tech Alliance
Dec 17, 2025 · Artificial Intelligence

Mastering Retrieval‑Augmented Generation: From Theory to Scalable Deployment

This guide explains how Retrieval‑Augmented Generation (RAG) overcomes LLM knowledge staleness, hallucination, and domain‑adaptation challenges by combining external knowledge bases with real‑time retrieval, and provides detailed architecture, optimization techniques, engineering practices, monitoring, cost‑control, and future trends for building production‑grade RAG systems.

AICloudflareLLM
0 likes · 15 min read
Mastering Retrieval‑Augmented Generation: From Theory to Scalable Deployment
Architects' Tech Alliance
Architects' Tech Alliance
Dec 10, 2025 · Fundamentals

How to Tame NVMe SSD Write Amplification and Extend Drive Life

This article explains why NVMe SSDs suffer from write amplification, how hardware characteristics, file‑system designs and workload patterns combine to increase I/O latency and wear, compares EXT4, NTFS and XFS behavior, and provides practical tuning, hardware‑feature usage and workload‑specific strategies to dramatically reduce WAF.

NVMeSSDWrite Amplification
0 likes · 17 min read
How to Tame NVMe SSD Write Amplification and Extend Drive Life
Architects' Tech Alliance
Architects' Tech Alliance
Nov 30, 2025 · Cloud Computing

How DPU Redefines Data Center Storage for AI and Cloud Workloads

This article analyzes the technical principles, architectural innovations, and real‑world scenarios of Data Processing Units (DPUs), showing how they resolve storage‑CPU mismatches, eliminate excessive east‑west traffic, and accelerate failure recovery, thereby becoming a core infrastructure for AI and cloud computing.

AIDPUData Center
0 likes · 15 min read
How DPU Redefines Data Center Storage for AI and Cloud Workloads
Architects' Tech Alliance
Architects' Tech Alliance
Nov 9, 2025 · Artificial Intelligence

Why Optical Interconnects Are the Next Bottleneck‑Breaker for Massive AI Clusters

This article systematically examines the demand, technology stack, and industry landscape of large‑scale AI compute clusters, highlighting the limitations of traditional copper interconnects and presenting device‑level and chip‑level optical interconnect solutions—including OCS, pluggable modules, silicon photonics, VCSEL, and micro‑LED—while outlining current challenges and future directions.

AI clustersData CenterSilicon Photonics
0 likes · 15 min read
Why Optical Interconnects Are the Next Bottleneck‑Breaker for Massive AI Clusters
Architects' Tech Alliance
Architects' Tech Alliance
Nov 9, 2025 · Artificial Intelligence

How SUE Ethernet Redefines AI Cluster Interconnects for Scale‑Up Performance

This article examines Broadcom's Scale Up Ethernet (SUE) framework, detailing how it addresses AI/HPC rack‑scale interconnect challenges by delivering ultra‑high bandwidth, microsecond‑level latency, memory‑semantic operations, and seamless compatibility with existing Ethernet infrastructure for large XPU clusters.

AI interconnectHPCHigh Bandwidth
0 likes · 12 min read
How SUE Ethernet Redefines AI Cluster Interconnects for Scale‑Up Performance
Architects' Tech Alliance
Architects' Tech Alliance
Nov 6, 2025 · Artificial Intelligence

Inside scaleX640: How China’s First 640‑Card Supernode Redefines AI Compute

The scaleX640 supernode, unveiled at the Wuzhen World Internet Conference, packs 640 AI accelerators into a single rack, delivering unprecedented compute density, energy efficiency, open ecosystem compatibility, and reliability features that enable massive AI model training and inference at scale.

AI hardwareenergy efficiencyhigh performance computing
0 likes · 4 min read
Inside scaleX640: How China’s First 640‑Card Supernode Redefines AI Compute
Architects' Tech Alliance
Architects' Tech Alliance
Nov 4, 2025 · Artificial Intelligence

Why the Data Center Processor Market Will Hit $3.7 T by 2030 – AI GPUs & ASICs Lead the Surge

The global data‑center processor market, valued at $1.47 trillion in 2024, is projected to more than double to $3.72 trillion by 2030, driven by explosive demand for generative AI workloads, rapid growth of GPUs and AI‑specific ASICs, and expanding roles for CPUs, DPUs and crypto‑mining chips.

AI ASICAI hardwareGPU market
0 likes · 6 min read
Why the Data Center Processor Market Will Hit $3.7 T by 2030 – AI GPUs & ASICs Lead the Surge